// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * LCD panel: ST7789V 2.8" 240x320 RGB 18-bit + 3SPI
 * Backlight: GPIO1_B0
 * LCD Reset: GPIO1_B1
 * SPI init:  GPIO4_A7(CLK) GPIO4_A5(CS) GPIO4_A1(MOSI)
 */

#include <linux/media-bus-format.h>

/ {
	backlight: backlight {
		compatible = "gpio-backlight";
		gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
		default-brightness-level = <200>;
		status = "okay";
	};

	panel: panel {
		compatible = "simple-panel-spi";
		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
		backlight = <&backlight>;

		/* LCD_RST (GPIO1_B1) — release ST7789V reset */
		enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
		enable-delay-ms = <10>;
		prepare-delay-ms = <10>;
		init-delay-ms = <120>;

		/* SPI bitbang for panel init (3-wire 9-bit protocol) */
		spi-sdi-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;  /* SPI1_MOSI */
		spi-scl-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;  /* SPI1_CLK */
		spi-cs-gpios  = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;  /* SPI1_CS0 */

		rockchip,cmd-type = "spi";
		rockchip,output = "rgb";
		rgb-mode = "p666";

		pinctrl-names = "default";
		pinctrl-0 = <&lcd_panel_gpios>;

		/* type(0=cmd,1=data) delay_ms num_bytes byte... */
		panel-init-sequence = [
			/* Sleep Out */
			00   78  01  11
			/* MADCTL — RGB orientation */
			00   00  01  36
			01   00  01  00
			/* COLMOD — 16bit (0x55) / 18bit (0x60) … use 0x06=RGB666 */
			00   00  01  3a
			01   00  01  06
			/* RAMCTRL */
			00   00  01  b0
			01   00  01  11
			01   00  01  00
			/* PORCTRK (Porch control) */
			00   00  01  b1
			01   00  01  40
			01   00  01  04
			01   00  01  0a
			/* GCTRL (Gate control) */
			00   00  01  b2
			01   00  01  0c
			01   00  01  0c
			01   00  01  00
			01   00  01  33
			01   00  01  33
			/* VCOMS */
			00   00  01  b7
			01   00  01  35
			/* VCOMS (VCOM setting) */
			00   00  01  bb
			01   00  01  2b
			/* Power Control 1 */
			00   00  01  c0
			01   00  01  2c
			/* VDV_VRH_EN */
			00   00  01  c2
			01   00  01  01
			/* VRH (VCOM Amplitude) */
			00   00  01  c3
			01   00  01  11
			/* VCIX_VGH */
			00   00  01  c4
			01   00  01  20
			/* VCOMS (VCOM) */
			00   00  01  c6
			01   00  01  0f
			/* Power Control 2 */
			00   00  01  d0
			01   00  01  a4
			01   00  01  a1
			/* Positive Gamma */
			00   00  01  e0
			01   00  01  d0
			01   00  01  00
			01   00  01  06
			01   00  01  09
			01   00  01  0b
			01   00  01  2a
			01   00  01  3c
			01   00  01  55
			01   00  01  4b
			01   00  01  08
			01   00  01  16
			01   00  01  14
			01   00  01  19
			01   00  01  20
			/* Negative Gamma */
			00   00  01  e1
			01   00  01  d0
			01   00  01  00
			01   00  01  06
			01   00  01  09
			01   00  01  0b
			01   00  01  29
			01   00  01  36
			01   00  01  54
			01   00  01  4b
			01   00  01  0d
			01   00  01  16
			01   00  01  14
			01   00  01  21
			01   00  01  20
			/* Display On */
			00   00  01  29
		];

		display-timings {
			native-mode = <&st7789v_timing>;

			st7789v_timing: timing0 {
				clock-frequency = <8500000>;
				hactive = <240>;
				vactive = <320>;
				hfront-porch = <10>;
				hback-porch  = <10>;
				hsync-len    = <10>;
				vfront-porch = <10>;
				vback-porch  = <10>;
				vsync-len    = <10>;
				hsync-active  = <0>;
				vsync-active  = <0>;
				de-active     = <0>;
				pixelclk-active = <0>;
			};
		};

		port {
			panel_in_rgb: endpoint {
				remote-endpoint = <&rgb_out_panel>;
			};
		};
	};
};

&display_subsystem {
	status = "okay";
	route {
		route_rgb: route-rgb {
			status = "okay";
			connect = <&panel_in_rgb>;
			logo,uboot = "logo.bmp";
			logo,kernel = "logo_kernel.bmp";
		};
	};
};

&vop {
	status = "okay";
};

&rgb {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_pins>;

	ports {
		rgb_out: port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			rgb_out_panel: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&panel_in_rgb>;
			};
		};
	};
};

&pinctrl {
	lcd-panel {
		lcd_panel_gpios: lcd-panel-gpios {
			rockchip,pins =
				/* SPI_MOSI (GPIO4_A1) */
				<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
				/* SPI_CLK (GPIO4_A7) */
				<4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,
				/* SPI_CS  (GPIO4_A5) */
				<4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};